Why Chip Designers Are Embracing Multi-Die Simulation cover art

Why Chip Designers Are Embracing Multi-Die Simulation

Why Chip Designers Are Embracing Multi-Die Simulation

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Episode 48 dives into the growing complexity of simulating multi-die chip designs, where chiplets and advanced packaging create new verification challenges. Lucas and Luna explore how EDA tools are evolving to handle system-level thermal, power, and signal integrity issues that single-die designs never faced. With specific data on simulation time blow-ups and real examples from the latest design flows, they examine why multi-die simulation is becoming a bottleneck—and the techniques engineers are using to break through. A must-hear for anyone following the shift to heterogeneous integration. #ChipDesign #MultiDie #Simulation #EDA #AdvancedPackaging #Chiplets #SignalIntegrity #ThermalManagement #PowerIntegrity #Verification #HeterogeneousIntegration #Semiconductor #Technology #HardwarePodcast #FexingoBusiness #BusinessPodcast #ElectronicsEngineering #DesignTools Keep every episode free: buymeacoffee.com/fexingo
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